In some approaches, when a circuit is powered up, many transistors are turned on at a same time. Powering up the circuit is also called waking up the circuit because the circuit is woken up for operation, from a sleep mode, for example. When many transistors are turned on during waking up, a large amount of current flows through corresponding power nodes used by the transistors and results in a current spike called a wakeup peak current.
Reducing the wakeup peak current of a circuit to be within a design specification increases a wakeup time of the circuit. For example, in an approach, a wakeup circuit includes a series of wakeup stages. Each wakeup stage includes a PMOS switch connected in a chain manner. A wakeup signal is sequentially fed to each PMOS switch to turn on the chained PMOS switches one by one in a sequential manner. By turning on each PMOS switch in a sequential manner, the wakeup peak current is reduced. In such a condition, the wakeup time increases, however. Logic gates are also used in the wakeup circuit and result in increased circuit areas.
FIG. 8 is a diagram of a memory macro usable in conjunction with the circuit depicted in FIG. 1, FIG. 4, or FIG. 7 in accordance with some embodiments.